The invention relates to a method of manufacturing a semiconductor device, in particular an integrated circuit, in a silicon body which is provided at a surface with an alignment grating for aligning the silicon body relative to masks which are used in a number of successive process steps to image patterns onto the surface of the silicon body, the alignment grating being provided in the form of a strip pattern of adjacent elevations and valleys, and the surface also being provided with a mask of a material which protects the silicon body against oxidation, which mask is provided with apertures at the location of the semiconductor device, whereafter the silicon body is provided with an oxide pattern by means of oxidation, which pattern is recessed in the silicon body over at least a part of its thickness and defines active regions in the silicon body.
A method of the type mentioned in the opening paragraph is known from U.S. Pat. No. 5,700,732. In said known method, prior to the manufacture of a semiconductor device, which is provided with an oxide pattern which is at least partly recessed in a silicon body, a surface of the silicon body is provided with an alignment grating in the form of a strip pattern of adjacent elevations and valleys, which correspond to a difference in height which is desirable for aligning. In subsequent process steps carried out to manufacture the semiconductor device, the previously provided alignment grating is used to align the silicon body relative to masks which, during these process steps, are used to image patterns onto the surface of the silicon body.
A disadvantage of the known method is that, prior to the process steps, which are relevant for the manufacture of the semiconductor device, extra process steps are necessary to provide the alignment grating. These extra process steps generally include a lithography step in which regions on the surface of the silicon body are defined for the valleys to be ultimately provided, followed by an etch step in which the valleys are formed by performing an etching operation on the silicon body over a specific distance corresponding to the difference in height necessary for aligning. The extra lithography and etch steps contribute significantly to the overall number of necessary process steps and hence to the total process costs.